BMDEN=DISABLED, ORDER=NO_REORDER, BBREN=DISABLED, SINITEN=DISABLED, POLYSEL=CRC_32_04C11DB7, CRCEN=DISABLED, SEED=ALL_ZEROES
Module Control
| SINITEN | Seed Initialization Enable. 0 (DISABLED): Do not initialize the CRC module to the value set by the SEED bit. 1 (ENABLED): Initialize the CRC module to the value set by the SEED bit. |
| SEED | Seed Setting. 0 (ALL_ZEROES): CRC seed value is all 0’s (0x00000000) 1 (ALL_ONES): CRC seed value is all 1’s (0xFFFFFFFF). |
| CRCEN | CRC Enable. 0 (DISABLED): Disable CRC operations. 1 (ENABLED): Enable CRC operations. |
| POLYSEL | Polynomial Selection. 0 (CRC_32_04C11DB7): Select 32-bit polynomial: 0x04C11DB7. 1 (CRC_16_1021): Select 16-bit polynomial: 0x1021. 2 (CRC_16_3D65): Select 16-bit polynomial: 0x3D65. 3 (CRC_16_8005): Select 16-bit polynomial: 0x8005. |
| BMDEN | Byte Mode Enable. 0 (DISABLED): Disable byte mode (word/byte width is determined automatically by the hardware). 1 (ENABLED): Enable byte mode (all writes are considered as bytes). |
| BBREN | Byte-Level Bit Reversal Enable. 0 (DISABLED): No byte-level bit reversal (input is same order as written). 1 (ENABLED): Byte-level bit reversal enabled (the bits in each byte are reversed). |
| ORDER | Input Processing Order. 0 (NO_REORDER): No byte reorientation (output is same order as input). 1 (BIG_ENDIAN_16): Swap for 16-bit big endian order (input: B3 B2 B1 B0, output: B2 B3 B0 B1). 2 (BIG_ENDIAN_32): Swap for 32-bit big endian order (input: B3 B2 B1 B0, output: B0 B1 B2 B3). |